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Where can I find a R81.10 documentation on what exactly is the difference between PSL inline and PSL pipeline?
Hi,
All, you're always welcome to approach me on any related matter @ [email protected]
I don't believe these are documented anywhere, but I think the inline path is only used if a Falcon accelerator card is present; that traffic was handled "inline" by the Falcon card between NIC ports.
The pipeline paths are Check Point's answer to the elephant flow issue of saturating a single core, and is the new feature I was alluding to at the end of my CPX speech on elephant flows. The pipeline paths first appeared in a Jumbo HFA of R80.40 but were not enabled by default. The pipeline paths are enabled by default in R81.10 (not sure about R81) and allow the processing of a single connection's packets to be spread across a limited number of worker cores (3 I think). Not sure if this is only invoked when a worker hits 100% kind of like Priority Queues.
Hi @Timothy_Hall,
I had already written an article on Falcon Cards "R8x - Security Gateway Architecture (Acceleration Card Offloading)".
Then the PSL inline path must be the "Inline path"???
Then the PSL pipeline must be the "Buffer path" or "Host path"
or "the pipeline paths are Check Point's answer to the elephant flow issue" that you describe???
I don't really understand it.
Can someone from Check Point R&D please answer this.
So that we get a 100% correct statement.
--------------------------------------------------------------------------------------------------------
Here are the paths to the Falcon Cards:
R80.20+ acceleration cards provide three new acceleration flows:
Inline path - For HTTP response body (until 1st tier match) and TLS bulk encryption/ decryption.
Buffer path - For HTTP requests, HTTP response headers and TLS handshakes.
Host Path - For non acceleration connections (eg. local connections) and connections on non acceleration card interface.
Yeah we need a clarification from R&D on this one. In the meantime I forgot to add that the inline paths seem to be part of the MUX feature described in this thread:
Information from R&D would be very helpful here.
No one understands the paths any more!
Any news from Check Point to this topic?
@idants Do you happen to know what these are?
I moved to a new position since then.
Please take it with Chen Muchtar.
Sorry about that.
@Chen_Muchtar ?
Hi,
All, you're always welcome to approach me on any related matter @ [email protected]
Great explanation, glad to see I was pretty close in my earlier post. Thanks!
I guess we need a TechTalk about it, @Chen_Muchtar
Did a TechTalk on this happen?
Seems like a good time to do one now, with R81.20 release coming 🙂
No, we are still trying to convince Chen 🙂
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